Fault Tolerance Evaluation Using Two Software Based Fault Injection Methods

A silicon independent C-Based model of the TTP/C protocol was implemented within the EU-founded project FIT. The C-based model is integrated in the C-Sim simulation environment. The main objective of this work is to verify whether the simulation model of the TTP/C protocol behaves in the presence of faults in the same way as the existing hardware prototype implementation. Thus, the experimental results of the software implemented fault injection ap plied in the simulation model and in the hardware implementation of the TTP/C network have been compared. Fault injection experiments in both, the hardware and the simulation model are performed using the same configuration setup, and the same fault injection input parameters (fault injection location , fault type and the fault injection time). The end result comparison has shown a complete conformance of 96.30%, while the cause of the different results was due to hardware specific implementation of the Built-In-Self-Test error detection mechanisms.